% Encoding: UTF-8

@Manual{IntelOptimizationManual,
  author       = {Intel},
  title        = {Intel® 64 and IA-32 Architectures Optimization Reference Manual},
  organization = {Intel® Corporation},
  year         = {2023},
  url          = {https://software.intel.com/content/www/us/en/develop/download/intel-64-and-ia-32-architectures-optimization-reference-manual.html},
}

@Manual{IntelRDTSC,
  author       = {Gabriele Paoloni},
  title        = {How to Benchmark Code Execution Times on Intel® IA-32 and IA-64 Instruction Set Architectures},
  organization = {Intel® Corporation},
  year         = {2010},
  url          = {https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-32-ia-64-benchmark-code-execution-paper.pdf},
}

@Manual{Domo2017,
  author       = {domo.com},
  title        = {Data Never Sleeps 5.0},
  organization = {Domo, Inc},
  year         = {2017},
  url          = {https://www.domo.com/learn/data-never-sleeps-5?aid=ogsm072517_1&sf100871281=1},
}

@Manual{Statista2024,
  author       = {statista.com},
  title  = {Volume of data/information created, captured, copied, and consumed worldwide from 2010 to 2020, with forecasts from 2021 to 2025},
  organization = {Statista, Inc},
  year   = {2024},
  url    = {https://www.statista.com/statistics/871513/worldwide-data-created/},
}

@Article{Lopes2018,
  author        = {Nuno P. Lopes and John Regehr},
  title         = {Future Directions for Optimizing Compilers},
  year          = {2018},
  date          = {2018-09-06},
  eprint        = {http://arxiv.org/abs/1809.02161v1},
  eprintclass   = {cs.PL},
  eprinttype    = {arXiv},
  file          = {:http\://arxiv.org/pdf/1809.02161v1:PDF},
  keywords      = {cs.PL},
}

@Article{Mytkowicz09,
  author     = {Mytkowicz, Todd and Diwan, Amer and Hauswirth, Matthias and Sweeney, Peter F.},
  title      = {Producing Wrong Data without Doing Anything Obviously Wrong!},
  journal    = {SIGPLAN Not.},
  year       = {2009},
  volume     = {44},
  number     = {3},
  pages      = {265–276},
  month      = mar,
  issn       = {0362-1340},
  address    = {New York, NY, USA},
  doi        = {10.1145/1508284.1508275},
  issue_date = {February 2009},
  keywords   = {measurement, bias, performance},
  numpages   = {12},
  publisher  = {Association for Computing Machinery},
  url        = {https://doi.org/10.1145/1508284.1508275},
}

@InProceedings{Curtsinger13,
  author    = {Curtsinger, Charlie and Berger, Emery D.},
  title     = {STABILIZER: Statistically Sound Performance Evaluation},
  booktitle = {Proceedings of the Eighteenth International Conference on Architectural Support for Programming Languages and Operating Systems},
  year      = {2013},
  series    = {ASPLOS ’13},
  pages     = {219–228},
  address   = {New York, NY, USA},
  publisher = {Association for Computing Machinery},
  doi       = {10.1145/2451116.2451141},
  isbn      = {9781450318709},
  keywords  = {measurement bias, randomization, performance evaluation},
  location  = {Houston, Texas, USA},
  numpages  = {10},
  url       = {https://doi.org/10.1145/2451116.2451141},
}

@Article{Chen2016,
  author        = {Jiahao Chen and Jarrett Revels},
  title         = {Robust benchmarking in noisy environments},
  year          = {2016},
  __markedentry = {[dbakhval:6]},
  date          = {2016-08-15},
  eprint        = {http://arxiv.org/abs/1608.04295v1},
  eprintclass   = {cs.PF},
  eprinttype    = {arXiv},
  file          = {:http\://arxiv.org/pdf/1608.04295v1:PDF},
  keywords      = {cs.PF, 68N30, B.8.1; D.2.5},
}

@inproceedings{TMA_ISPASS,
author = {Yasin, Ahmad},
year = {2014},
month = {03},
pages = {35-44},
title = {A Top-Down method for performance analysis and counters architecture},
isbn = {978-1-4799-3606-9},
doi = {10.1109/ISPASS.2014.6844459}
}

@Article{LemireBranchless,
  author = {Daniel Lemire},
  title  = {Making Your Code Faster by Taming Branches},
  year   = {2020},
  url    = {https://www.infoq.com/articles/making-code-faster-taming-branches/},
}

@inproceedings{Nowak2014TheOO,
  author={Andrzej Nowak and Georgios Bitzes},
  title={The overhead of profiling using PMU hardware counters},
  year={2014},
  url={https://zenodo.org/record/10800/files/TheOverheadOfProfilingUsingPMUhardwareCounters.pdf},
}

@inproceedings{HfSort,
author = {Ottoni, Guilherme and Maher, Bertrand},
title = {Optimizing Function Placement for Large-Scale Data-Center Applications},
year = {2017},
isbn = {9781509049318},
publisher = {IEEE Press},
booktitle = {Proceedings of the 2017 International Symposium on Code Generation and Optimization},
pages = {233–244},
numpages = {12},
location = {Austin, USA},
series = {CGO ’17},
url={https://ieeexplore.ieee.org/document/7863743},
}

@inproceedings{AutoFDO,
title	= {AutoFDO: Automatic Feedback-Directed Optimization for Warehouse-Scale Applications},
author	= {Dehao Chen and David Xinliang Li and Tipp Moseley},
year	= {2016},
booktitle	= {CGO 2016 Proceedings of the 2016 International Symposium on Code Generation and Optimization},
pages	= {12-23},
address	= {New York, NY, USA},
url={https://ieeexplore.ieee.org/document/7559528},
}

@article{BBReordering,
  author    = {Andy Newell and Sergey Pupyrev},
  title     = {Improved Basic Block Reordering},
  journal   = {CoRR},
  volume    = {abs/1809.04676},
  year      = {2018},
  url       = {http://arxiv.org/abs/1809.04676},
  archivePrefix = {arXiv},
  eprint    = {1809.04676},
  timestamp = {Fri, 05 Oct 2018 11:34:52 +0200},
  biburl    = {https://dblp.org/rec/journals/corr/abs-1809-04676.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{BOLT,
  author    = {Maksim Panchenko and
               Rafael Auler and
               Bill Nell and
               Guilherme Ottoni},
  title     = {{BOLT:} {A} Practical Binary Optimizer for Data Centers and Beyond},
  journal   = {CoRR},
  volume    = {abs/1807.06735},
  year      = {2018},
  url       = {http://arxiv.org/abs/1807.06735},
  archivePrefix = {arXiv},
  eprint    = {1807.06735},
  timestamp = {Mon, 13 Aug 2018 16:46:24 +0200},
  biburl    = {https://dblp.org/rec/journals/corr/abs-1807-06735.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@book{Hennessy,
author = {Hennessy, John L. and Patterson, David A.},
title = {Computer Architecture, Sixth Edition: A Quantitative Approach},
year = {2017},
isbn = {0128119055},
publisher = {Morgan Kaufmann Publishers Inc.},
address = {San Francisco, CA, USA},
edition = {6th},
}

@book{ShenLipasti,
  title={Modern Processor Design: Fundamentals of Superscalar Processors},
  author={Shen, J.P. and Lipasti, M.H.},
  isbn={1-4786-0783-1},
  year={2013},
  publisher={Waveland Press, Inc.}
}

@misc{fogOptimizeCpp,
  title={Optimizing software in C++: An optimization guide for Windows, Linux and Mac platforms},
  author={Fog, Agner},
  year={2023},
  url = {https://www.agner.org/optimize/optimizing_cpp.pdf},
}

@article{fogMicroarchitecture,
  title={The microarchitecture of Intel, AMD and VIA CPUs: An optimization guide for assembly programmers and compiler makers},
  author={Fog, Agner},
  journal={Copenhagen University College of Engineering},
  url = {https://www.agner.org/optimize/microarchitecture.pdf},
  year={2023}
}

@article{GoogleProfiling,
author = {Kanev, Svilen and Darago, Juan Pablo and Hazelwood, Kim and Ranganathan, Parthasarathy and Moseley, Tipp and Wei, Gu-Yeon and Brooks, David},
title = {Profiling a Warehouse-Scale Computer},
year = {2015},
issue_date = {January 2016},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
volume = {43},
number = {3S},
issn = {0163-5964},
url = {https://doi.org/10.1145/2872887.2750392},
doi = {10.1145/2872887.2750392},
journal = {SIGARCH Comput. Archit. News},
month = jun,
pages = {158–169},
numpages = {12}
}
  
@misc{EytzingerArray,
    title={Array Layouts for Comparison-Based Searching},
    author={Paul-Virak Khuong and Pat Morin},
    year={2015},
    eprint={1509.05053},
    archivePrefix={arXiv},
    primaryClass={cs.DS},
    url={https://arxiv.org/ftp/arxiv/papers/1509/1509.05053.pdf},
}

@article{GoogleWideProfiling,
title	= {Google-Wide Profiling: A Continuous Profiling Infrastructure for Data Centers},
author	= {Gang Ren and Eric Tune and Tipp Moseley and Yixin Shi and Silvius Rus and Robert Hundt},
year	= {2010},
URL	= {http://www.computer.org/portal/web/csdl/doi/10.1109/MM.2010.68},
journal	= {IEEE Micro},
pages	= {65-79}
}

@article{CozPaper,
author = {Curtsinger, Charlie and Berger, Emery D.},
title = {Coz: Finding Code That Counts with Causal Profiling},
year = {2018},
issue_date = {June 2018},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
volume = {61},
number = {6},
issn = {0001-0782},
url = {https://doi.org/10.1145/3205911},
doi = {10.1145/3205911},
journal = {Commun. ACM},
month = {may},
pages = {91–99},
numpages = {9}
}

@book{Akinshin2019,
  author    = {Akinshin, Andrey}, 
  title     = {Pro .NET Benchmarking},
  publisher = {Apress},
  year      = {2019},
  edition   = {1},
  pages     = {690},
  isbn      = {978-1-4842-4940-6},
  doi       = {10.1007/978-1-4842-4941-3}
}

@book{OptimizingCompilersForModernArchs,
  author    = {Allen, Randy and Kennedy, Ken},
  title     = {Optimizing Compilers for Modern Architectures: A Dependence-based Approach},
  publisher = {Morgan-Kaufmann},
  year      = {2001},
  edition   = {1},
  pages     = {816},
  isbn      = {978-1558602861},
}

@book{HackersDelight,
  author    = {Henry S. Warren}, 
  title     = {Hacker's Delight},
  publisher = {Addison-Wesley},
  year      = {2012},
  edition   = {2},
  pages     = {512},
  isbn      = {978-0321842688},
}

@book{SystemsPerformance,
author = {Gregg, Brendan},
title = {Systems Performance: Enterprise and the Cloud},
year = {2013},
isbn = {0133390098},
publisher = {Prentice Hall Press},
address = {USA},
edition = {1st}
}

@article{GAPP,
   title={GAPP: A Fast Profiler for Detecting Serialization Bottlenecks in Parallel Linux Applications},
   ISBN={9781450369916},
   url={http://dx.doi.org/10.1145/3358960.3379136},
   DOI={10.1145/3358960.3379136},
   journal={Proceedings of the ACM/SPEC International Conference on Performance Engineering},
   publisher={ACM},
   author={Nair, Reena and Field, Tony},
   year={2020},
   month={Apr}
}

@inproceedings{Mytkowicz,
author = {Mytkowicz, Todd and Diwan, Amer and Hauswirth, Matthias and Sweeney, Peter F.},
title = {Producing Wrong Data without Doing Anything Obviously Wrong!},
year = {2009},
isbn = {9781605584065},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
url = {https://doi.org/10.1145/1508244.1508275},
doi = {10.1145/1508244.1508275},
booktitle = {Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems},
pages = {265–276},
numpages = {12},
keywords = {performance, measurement, bias},
location = {Washington, DC, USA},
series = {ASPLOS XIV}
}

@misc{IntelBlueprint,
  title        = {Runtime Performance Optimization Blueprint: Intel® Architecture Optimization With Large Code Pages},
  author       = {Suresh Srinivas, et al.},
  organization = {Intel® Corporation},
  year         = {2019},
  url          = {https://www.intel.com/content/www/us/en/develop/articles/runtime-performance-optimization-blueprint-intel-architecture-optimization-with-large-code.html},
}

@online{HennessyGoogleIO,
  title = {The future of computing},
  year = {2018},
  organization = {Youtube},
  author = {John L. Hennessy},
  url = {https://youtu.be/Azt8Nc-mtKM?t=329},
}

@article {Leisersoneaam9744,
	author = {Leiserson, Charles E. and Thompson, Neil C. and Emer, Joel S. and Kuszmaul, Bradley C. and Lampson, Butler W. and Sanchez, Daniel and Schardl, Tao B.},
	title = {There{\textquoteright}s plenty of room at the Top: What will drive computer performance after Moore{\textquoteright}s law?},
	volume = {368},
	number = {6495},
	elocation-id = {eaam9744},
	year = {2020},
	doi = {10.1126/science.aam9744},
	publisher = {American Association for the Advancement of Science},
	issn = {0036-8075},
	URL = {https://science.sciencemag.org/content/368/6495/eaam9744},
	eprint = {https://science.sciencemag.org/content/368/6495/eaam9744.full.pdf},
	journal = {Science}
}

@inproceedings{UnderstandingPerfRegress,
author = {Jin, Guoliang and Song, Linhai and Shi, Xiaoming and Scherpelz, Joel and Lu, Shan},
title = {Understanding and Detecting Real-World Performance Bugs},
year = {2012},
isbn = {9781450312059},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
url = {https://doi.org/10.1145/2254064.2254075},
doi = {10.1145/2254064.2254075},
booktitle = {Proceedings of the 33rd ACM SIGPLAN Conference on Programming Language Design and Implementation},
pages = {77–88},
numpages = {12},
keywords = {performance bugs, characteristics study, rule-based bug detection},
location = {Beijing, China},
series = {PLDI ’12}
}
  
@inproceedings{MongoDBChangePointDetection,
author = {Daly, David and Brown, William and Ingo, Henrik and O’Leary, Jim and Bradford, David},
title = {The Use of Change Point Detection to Identify Software Performance Regressions in a Continuous Integration System},
year = {2020},
isbn = {9781450369916},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
url = {https://doi.org/10.1145/3358960.3375791},
doi = {10.1145/3358960.3375791},
booktitle = {Proceedings of the ACM/SPEC International Conference on Performance Engineering},
pages = {67–75},
numpages = {9},
keywords = {testing, performance, change points, continuous integration},
location = {Edmonton AB, Canada},
series = {ICPE ’20}
}
  
@inproceedings{Evergreen,
author = {Ingo, Henrik and Daly, David},
title = {Automated System Performance Testing at MongoDB},
year = {2020},
isbn = {9781450380010},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
url = {https://doi.org/10.1145/3395032.3395323},
doi = {10.1145/3395032.3395323},
booktitle = {Proceedings of the Workshop on Testing Database Systems},
articleno = {3},
numpages = {6},
keywords = {MongoDB, performance, distributed databases, testing, databases, cloud, Python},
location = {Portland, Oregon},
series = {DBTest ’20}
}
  
@article{ChangePointAnalysis,
author = {David S. Matteson and Nicholas A. James},
title = {A Nonparametric Approach for Multiple Change Point Analysis of Multivariate Data},
journal = {Journal of the American Statistical Association},
volume = {109},
number = {505},
pages = {334-345},
year  = {2014},
publisher = {Taylor & Francis},
doi = {10.1080/01621459.2013.849605},
URL = {https://doi.org/10.1080/01621459.2013.849605},
}

@incollection{AutoPerf,
title = {A Zero-Positive Learning Approach for Diagnosing Software Performance Regressions},
author = {Alam, Mejbah and Gottschlich, Justin and Tatbul, Nesime and Turek, Javier S and Mattson, Tim and Muzahid, Abdullah},
booktitle = {Advances in Neural Information Processing Systems 32},
editor = {H. Wallach and H. Larochelle and A. Beygelzimer and F. d\textquotesingle Alch\'{e}-Buc and E. Fox and R. Garnett},
pages = {11627--11639},
year = {2019},
publisher = {Curran Associates, Inc.},
url = {http://papers.nips.cc/paper/9337-a-zero-positive-learning-approach-for-diagnosing-software-performance-regressions.pdf}
}

@misc{liu2019largescale,
    title={Large-Scale Online Experimentation with Quantile Metrics},
    author={Min Liu and Xiaohui Sun and Maneesh Varshney and Ya Xu},
    year={2019},
    eprint={1903.08762},
    archivePrefix={arXiv},
    primaryClass={stat.AP},
    url={https://arxiv.org/abs/1903.08762},
}

@article{IntelPTPaper,
   author = {Suchakrapani Datt Sharma},
   author = {Michel Dagenais},
   keywords = {latency detection;syscall latency profiling;fine-tuning hardware tracing;hardware-assisted instruction profiling;hardware-based tracing;software tracing;sixth generation Intel processors;optimum utilisation;},
   language = {English},
   title = {Hardware-assisted instruction profiling and latency detection},
   journal = {The Journal of Engineering},
   issue = {10},   
   volume = {2016},
   year = {2016},
   month = {October},
   pages = {367-376(9)},
   publisher ={Institution of Engineering and Technology},
   copyright = {This is an open access article published by the IET under the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0/)},
   url = {https://digital-library.theiet.org/content/journals/10.1049/joe.2016.0127}
}

@inproceedings{PMC_virtual,
author = {Du, Jiaqing and Sehrawat, Nipun and Zwaenepoel, Willy},
title = {Performance Profiling in a Virtualized Environment},
year = {2010},
publisher = {USENIX Association},
address = {USA},
booktitle = {Proceedings of the 2nd USENIX Conference on Hot Topics in Cloud Computing},
pages = {2},
numpages = {1},
location = {Boston, MA},
series = {HotCloud'10},
url={https://www.usenix.org/legacy/event/hotcloud10/tech/full_papers/Du.pdf},
}

@article{Mula_Lemire_2019,
   title={Base64 encoding and decoding at almost the speed of a memory copy},
   volume={50},
   ISSN={1097-024X},
   url={http://dx.doi.org/10.1002/spe.2777},
   DOI={10.1002/spe.2777},
   number={2},
   journal={Software: Practice and Experience},
   publisher={Wiley},
   author={Muła, Wojciech and Lemire, Daniel},
   year={2019},
   month={Nov},
   pages={89–97}
}

@inproceedings{ISPC_Paper,
  author={Pharr, Matt and Mark, William R.},
  booktitle={2012 Innovative Parallel Computing (InPar)}, 
  title={ispc: A SPMD compiler for high-performance CPU programming}, 
  year={2012},
  pages={1-13},
  doi={10.1109/InPar.2012.6339601},
  url={https://ispc.github.io/papers/ispc_inpar_2012.pdf},
}

@article{CacheLocking,
author = {Mittal, Sparsh},
year = {2016},
month = {05},
pages = {},
title = {A Survey Of Techniques for Cache Locking},
volume = {21},
journal = {ACM Transactions on Design Automation of Electronic Systems},
doi = {10.1145/2858792}
}

@book{EngineeringACompilerBook,
  title={Engineering a Compiler},
  author={Cooper, K.D. and Torczon, L.},
  isbn={9780120884780},
  lccn={2011288670},
  series={Morgan Kaufmann},
  url={https://books.google.co.in/books?id=CGTOlAEACAAJ},
  year={2012},
  publisher={Morgan Kaufmann}
}

@article{Grosser2012PollyP,
  title={Polly - Performing Polyhedral Optimizations on a Low-Level Intermediate Representation},
  author={Tobias Grosser and Armin Gr{\"o}{\ss}linger and C. Lengauer},
  journal={Parallel Process. Lett.},
  year={2012},
  volume={22}
}

@inproceedings{Luo2015,
  author={Luo, Taowei and Wang, Xiaolin and Hu, Jingyuan and Luo, Yingwei and Wang, Zhenlin},
  booktitle={2015 15th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing}, 
  title={Improving TLB Performance by Increasing Hugepage Ratio}, 
  year={2015},
  volume={},
  number={},
  pages={1139-1142},
  doi={10.1109/CCGrid.2015.36}
}

@article{Seznec2006,
  title={A case for (partially) TAgged GEometric history length branch prediction},
  author={Andr{\'e} Seznec and Pierre Michaud},
  journal={J. Instr. Level Parallelism},
  year={2006},
  volume={8},
  url={https://inria.hal.science/hal-03408381/document},
}

@INPROCEEDINGS{Jimenez2001,
  author={Jimenez, D.A. and Lin, C.},
  booktitle={Proceedings HPCA Seventh International Symposium on High-Performance Computer Architecture}, 
  title={Dynamic branch prediction with perceptrons}, 
  year={2001},
  volume={},
  number={},
  pages={197-206},
  doi={10.1109/HPCA.2001.903263}
}


@Comment{TODO: this one is not used}

@misc{RobustBenchmarking,
    title={Robust benchmarking in noisy environments},
    author={Jiahao Chen and Jarrett Revels},
    year={2016},
    eprint={1608.04295},
    archivePrefix={arXiv},
    primaryClass={cs.PF}
}

@Manual{AMDProgrammingManual,
  author       = {AMD},
  title        = {AMD64 Architecture Programmer's Manual},
  organization = {Advanced Micro Devices, Inc.},
  year         = {2023},
  url          = {https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf},
}

@Manual{AMDUprofManual,
  author       = {AMD},
  title        = {AMD uProf User Guide, Revision 4.2},
  organization = {Advanced Micro Devices, Inc.},
  year         = {2024},
  url          = {https://www.amd.com/content/dam/amd/en/documents/developer/version-4-2-documents/uprof/uprof-user-guide-v4.2.pdf},
}

@Manual{Armv9ManualSupplement,
  author       = {Arm},
  title        = {Arm Architecture Reference Manual Supplement Armv9},
  organization = {Arm Limited},
  year         = {2022},
  url          = {https://documentation-service.arm.com/static/632dbdace68c6809a6b41710?token=},
}

@Manual{ARMNeoverseV1,
  author       = {Arm},
  title        = {Arm Neoverse™ V1 PMU Guide, Revision: r1p2},
  organization = {Arm Limited},
  year         = {2022},
  url          = {https://developer.arm.com/documentation/PJDOC-1063724031-605393/2-0/?lang=en},
}

@Manual{ARMNeoverseV1TopDown,
  author       = {Arm},
  title        = {Arm Neoverse V1 Core: Performance Analysis Methodology},
  organization = {Arm Limited},
  year         = {2023},
  url          = {https://armkeil.blob.core.windows.net/developer/Files/pdf/white-paper/neoverse-v1-core-performance-analysis.pdf},
}

@Manual{ARMSPE,
  author       = {Arm},
  title        = {Arm Statistical Profiling Extension: Performance Analysis Methodology},
  organization = {Arm Limited},
  year         = {2023},
  url          = {https://developer.arm.com/documentation/109429/latest/},
}

@ARTICLE{ComparisonPEBSIBS,
  author={Sasongko, Muhammad Aditya and Chabbi, Milind and Kelly, Paul H J and Unat, Didem},
  journal={IEEE Transactions on Parallel and Distributed Systems}, 
  title={Precise Event Sampling on AMD Versus Intel: Quantitative and Qualitative Comparison}, 
  year={2023},
  volume={34},
  number={5},
  pages={1594-1608},
  url={https://ieeexplore.ieee.org/document/10068807},
  doi={10.1109/TPDS.2023.3257105}
}

@inproceedings{QoSXeon,
  title        = {{Cache QoS}: From concept to reality in the {Intel® Xeon® processor E5-2600} v3 product family},
  author       = {A. {Herdrich} and others},
  year         = 2016,
  booktitle    = {HPCA},
  pages        = {657--668},
  url          = {https://ieeexplore.ieee.org/document/7446102}
}

@inproceedings{QoSThunderX,
  title        = {{SWAP:} Effective Fine-Grain Management of Shared Last-Level Caches with Minimum Hardware Support},
  author       = {Wang, Xiaodong and others},
  year         = 2017,
  booktitle    = {HPCA},
  pages        = {121--132},
  url          = {https://ieeexplore.ieee.org/document/7920819}
}

@misc{amd_milan,
  title        = {{AMD EPYC} 7003 Series Microarchitecture Overview},
  author       = {Chris Karamatas},
  year         = 2022,
  month        = Mar,
  howpublished = {Pub. 57075, rev 3.0},
  url          = {https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/white-papers/overview-amd-epyc7003-series-processors-microarchitecture.pdf}
}

@misc{amd_ppr,
  title        = {{Processor Programming Reference (PPR)} for {AMD} Family 19h Model 01h (55898)},
  year         = 2021,
  month        = may,
  author       = {{Advanced Micro Devices}},
  howpublished = {B1 Rev 0.50},
  url          = {https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip}
}

@misc{amd_zen4,
  title        = {{Software Optimization Guide for the AMD Zen4 Microarchitecture}},
  year         = 2023,
  month        = Jan,
  author       = {{Advanced Micro Devices}},
  howpublished = {Rev 1.00},
  url          = {https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/software-optimization-guides/57647.zip}
}

@misc{QoSAMD,
  title        = {{AMD64} Technology Platform Quality of Service Extensions},
  author       = {{Advanced Micro Devices}},
  year         = 2022,
  month        = feb,
  howpublished = {Pub. 56375, rev 1.01},
  url          = {https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/other/56375_1_03_PUB.pdf}
}

@article{MemCharacterizationSPEC2006,
  title        = {{Memory hierarchy characterization of SPEC CPU2006 and SPEC CPU2017 on the Intel Xeon Skylake-SP}},
  author       = {Navarro-Torres, Agustín AND others},
  year         = 2019,
  journal      = {PLOS ONE},
  pages        = {1--24},
  url          = {https://journals.plos.org/plosone/article?id=10.1371/journal.pone.0220135}
}

@Article{Balancer2023,
  author       = {Navarro-Torres, Agust{\'i}n and Alastruey-Bened{\'e}, Jes{\'u}s and Ib{\'a}{\~{n}}ez, Pablo and Vi{\~{n}}als-Y{\'u}fera, V{\'i}ctor},
  title        = {BALANCER: bandwidth allocation and cache partitioning for multicore processors},
  journal      = {The Journal of Supercomputing},
  year         = {2023},
  month        = {Jun},
  day          = {01},
  volume       = {79},
  number       = {9},
  pages        = {10252-10276},
  issn         = {1573-0484},
  doi          = {10.1007/s11227-023-05070-0},
  url          = {https://doi.org/10.1007/s11227-023-05070-0}
}

@online{MICRO23DebbieMarr,
  title = {Keynote: Architecting for Power-Efficiency in General-Purpose Computing},
  year = {2023},
  organization = {Youtube},
  author = {Debbie Marr},
  url = {https://youtu.be/IktNjMxJYPE?t=2599},
}

@INPROCEEDINGS{RISCvsCISC2013,
  author={Blem, Emily and Menon, Jaikrishnan and Sankaralingam, Karthikeyan},
  booktitle={2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)}, 
  title={Power struggles: Revisiting the RISC vs. CISC debate on contemporary ARM and x86 architectures}, 
  year={2013},
  volume={},
  number={},
  pages={1-12},
  url={https://ieeexplore.ieee.org/document/6522302},
  keywords={Abstracts;Reduced instruction set computing;Mobile communication;Servers},
  doi={10.1109/HPCA.2013.6522302}
}

@inproceedings{RISCVvsAArch642023,
author = {Weaver, Daniel and McIntosh-Smith, Simon},
title = {An Empirical Comparison of the RISC-V and AArch64 Instruction Sets},
year = {2023},
isbn = {9798400707858},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
url = {https://doi.org/10.1145/3624062.3624233},
doi = {10.1145/3624062.3624233},
booktitle = {Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis},
pages = {1557–1565},
numpages = {9},
keywords = {AArch64, Comparison, Performance, RISC-V, SimEng Simulation},
location = {<conf-loc>, <city>Denver</city>, <state>CO</state>, <country>USA</country>, </conf-loc>},
series = {SC-W '23}
}

@misc{CodeDensityCISCvsRISC,
  title={Debunking CISC vs RISC code density},
  author={Geelnard, Marcus},
  year={2022},
  url = {https://www.bitsnbites.eu/cisc-vs-risc-code-density/},
}

@misc{ChipsAndCheesex86,
  title={Why x86 Doesn’t Need to Die},
  author={ChipsAndCheese},
  year={2024},
  url = {https://chipsandcheese.com/2024/03/27/why-x86-doesnt-need-to-die/},
}

@Manual{AppleOptimizationGuide,
  author       = {Apple},
  title        = {Apple Silicon CPU Optimization Guide: 3.0},
  organization = {Apple® Inc.},
  year         = {2024},
  url          = {https://developer.apple.com/documentation/apple-silicon/cpu-optimization-guide},
}

@article{SurveyOfPolyhedralCompilers,
author = {Thangamani, Arun and Loechner, Vincent and Genaud, St\'{e}phane},
title = {A Survey of General-purpose Polyhedral Compilers},
year = {2024},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
url = {https://doi.org/10.1145/3674735},
abstract = {Since the 1990’s many implementations of polyhedral compilers have been written and distributed, either as source-to-source translating compilers or integrated into wider purpose compilers. This paper provides a survey on those various available implementations as of today, 2024. We list and describe most commonly available polyhedral schedulers and compiler implementations. Then, we compare the general-purpose polyhedral compilers using two main criteria, robustness and performance, on the PolyBench/C set of benchmarks.},
journal = {ACM Trans. Archit. Code Optim.},
}

@article{Knuth1974StructuredPW,
  title={Structured Programming with go to Statements},
  author={Donald Ervin Knuth},
  journal={ACM Comput. Surv.},
  year={1974},
  volume={6},
  pages={261-301},
  url={https://api.semanticscholar.org/CorpusID:207630080}
}

@article{MeasureOneLevelDeeper,
author = {Ousterhout, John},
title = {Always measure one level deeper},
year = {2018},
issue_date = {July 2018},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
volume = {61},
number = {7},
issn = {0001-0782},
url = {https://doi.org/10.1145/3213770},
doi = {10.1145/3213770},
abstract = {Performance measurements often go wrong, reporting surface-level results that are more marketing than science.},
journal = {Commun. ACM},
month = jun,
pages = {74–83},
numpages = {10}
}

@article{RooflinePaper,
author = {Williams, Samuel and Waterman, Andrew and Patterson, David},
title = {Roofline: an insightful visual performance model for multicore architectures},
year = {2009},
issue_date = {April 2009},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
volume = {52},
number = {4},
issn = {0001-0782},
url = {https://doi.org/10.1145/1498765.1498785},
doi = {10.1145/1498765.1498785},
abstract = {The Roofline model offers insight on how to improve the performance of software and hardware.},
journal = {Commun. ACM},
month = apr,
pages = {65–76},
numpages = {12}
}

@book{DickSitesBook,
  title={Understanding Software Dynamics},
  author={Sites, Richard},
  isbn={9780137589739},
  series={Addison-Wesley professional computing series},
  url={https://books.google.com/books?id=TklozgEACAAJ},
  year={2022},
  publisher={Addison-Wesley}
}


@Comment{jabref-meta: databaseType:bibtex;}
